Multiplexer

Schematic of a 2-to-1 Multiplexer. It can be equated to a controlled switch.

Schematic of a 1-to-2 Demultiplexer. Like a multiplexer, it can be equated to a controlled switch.

In electronics, a multiplexer or mux (occasionally the term muldex is also found, for a combination multiplexer-demultiplexer) is a device that performs multiplexing: it selects one of many analog or digital data sources and outputs that source into a single channel. Multiplexer divides one high-speed communication circuit into several lower speed circuits (for the primary reason of saving communication line cost) which allows many devices to use it simultaneously. A demultiplexer (or demux) is a device taking a single input that selects one of many data-output-lines and connects the single input to the selected output line. A multiplexer is often used with a complementary demultiplexer on the receiving end. An electronic multiplexer functions as multiple-input, single-output switch. A multiplexer has multiple inputs and a selector that connects a specific input to the single output. The schematic symbol for a multiplexer is an isosceles trapezoid with the longer parallel side containing the input pins and the short parallel side containing the output pin. The schematic on the right shows a 2-to-1 multiplexer on the left and an equivalent switch on the right. The <math>sel</math> wire connects the desired input to the output.

In telecommunications, a multiplexer is a device that performs multiplexing, i.e. that combines multiple analog message signals or digital data streams into one signal. In telecommunications and signal processing, an analog time division multiplexer may take several samples of separate analogue signals and combine them into one pulse amplitude modulated (PAM) wide-band analogue signal. Alternatively, a digital TDM multiplexer may combine a limited number of constant bit rate digital data streams into one data stream of a higher data rate, by forming data frames consisting of one timeslot per channel. In telecommunications and computer networks, a statistical multiplexer may combine several variable bit rate data streams into one constant bandwidth signal, for example by means of packet mode communication. An inverse multiplexer may utilize several communication channels for transferring one signal.

Cost savings

The basic function of a multiplexer: combining multiple inputs into a single data stream. On the receiving side, a demultiplexer splits the single data stream into the original multiple signals.

One use for multiplexers is cost savings by connecting a multiplexer and a demultiplexer (or demux) together over a single channel (by connecting the multiplexer's single output to the demultiplexer's single input). The image to the right demonstrates this. In this case, the cost of implementing separate channels for each data source is more expensive than the cost and inconvenience of providing the multiplexing/demultiplexing functions. In a physical analogy, consider the merging behaviour of commuters crossing a narrow bridge; vehicles will take turns using the few available lanes. Upon reaching the end of the bridge they will separate into separate routes to their destinations. At the receiving end of the data link a complementary demultiplexer is normally required to break single data stream back down into the original streams. In some cases, the far end system may have more functionality than a simple demultiplexer and so, whilst the demultiplexing still exists logically, it may never actually happen physically. This would be typical where a multiplexer serves a number of IP network users and then feeds directly into a router which immediately reads the content of the entire link into its routing processor and then does the demultiplexing in memory from where it will be converted directly into IP packets. It is usual to combine a multiplexer and a demultiplexer together into one piece of equipment and simply refer to the whole thing as a "multiplexer". Both pieces of equipment are needed at both ends of a transmission link because most communications systems transmit in both directions. A real world example is the creation of telemetry for transmission from the computer/instrumentation system of a satellite, space craft or other remote vehicle to a ground system. In analog circuit design, a multiplexer is a special type of analog switch that connects one signal selected from several inputs to a single output.

Digital multiplexers

In digital circuit design, the selector wires are of digital value. In the case of a 2-to-1 multiplexer, a logic value of 0 would connect <math>I_0</math> to the output while a logic value of 1 would connect <math>I_1</math> to the output. In larger multiplexers, the number of selector pins is equal to <math>\left \lceil \log_2(n) \right \rceil</math> where <math>n</math> is the number of inputs. For example, 9 to 16 inputs would require no less than 4 selector pins and 17 to 32 inputs would require no less than 5 selector pins. The binary value expressed on these selector pins determines the selected input pin. A 2-to-1 multiplexer has a boolean equation where <math>A</math> and <math>B</math> are the two inputs, <math>S</math> is the selector input, and <math>Z</math> is the output:

<math>Z = ( A \cdot \overline{S}) + (B \cdot S)</math>

A 2-to-1 mux

Which can be expressed as a truth table:

This truth table should make it quite clear that when <math>S=0</math> then <math>Z=A</math> but when <math>S=1</math> then <math>Z=B</math>. A straightforward realization of this 2-to-1 multiplexer would need 2 AND gates, 2 OR gates, and a NOT gate. Larger multiplexers are also common and, as stated above, requires <math>\left \lceil \log_2(n) \right \rceil</math> selector pins for <math>n</math> inputs. Other common sizes are 4-to-1, 8-to-1, and 16-to-1. Since digital logic uses binary values, powers of 2 are used (4, 8, 16) to maximally control a number of inputs for the given number of selector inputs.

4-to-1 mux

8-to-1 mux

16-to-1 mux

The boolean equation for a 4-to-1 multiplexer is:

<math>F = (I_0 \cdot \overline{S_0} \cdot \overline{S_1}) + (I_1 \cdot S_0 \cdot \overline{S_1}) + (I_2 \cdot \overline{S_0} \cdot S_1) + (I_3 \cdot S_0 \cdot S_1)</math>

Two realizations for creating a 4-to-1 multiplexer are shown below:

These are two realizations of a 4-to-1 multiplexer: one realized from a decoder, AND gates, and an OR gate one realized from 3-state buffers and AND gates (the AND gates are acting as the decoder) Note that the subscripts on the <math>I_n</math> inputs indicate the decimal value of the binary control inputs at which that input is let through.

Chaining multiplexers

Larger multiplexers can be constructed by using smaller multiplexers by chaining them together. For example, an 8-to-1 multiplexer can be made with two 4-to-1 and one 2-to-1 multiplexers. The two 4-to-1 multiplexer outputs are fed into the 2-to-1 with the selector pins on the 4-to-1's put in parallel giving a total number of selector inputs to 3, which is equivalent to an 8-to-1.

List of ICs which provide multiplexing

The 7400 series has several ICs that contain multiplexer(s):

Digital demultiplexers

Demultiplexers take one data input and a number of selection inputs, and they have several outputs. They forward the data input to one of the outputs depending on the values of the selection inputs. Demultiplexers are sometimes convenient for designing general purpose logic, because if the demultiplexer's input is always true, the demultiplexer acts as a decoder. This means that any function of the selection bits can be constructed by logically OR-ing the correct set of outputs.

Example: A Single Bit 1-to-4 Line Demultiplexer

List of ICs which provide demultiplexing

The 7400 series has several ICs that contain demultiplexer(s):

See also

• Barrel shifter
• MDM
• Inverse multiplexer
• Statistical multiplexer
• Digital subscriber line access multiplexer (DSLAM)
• Rule 184, a cellular automaton in which each cell acts as a multiplexer for the values from the two adjacent cells
• Multiplexing
  • Code-division multiplexing
  • Frequency-division multiplexing
  • Time-division multiplexing
  • Wavelength-division multiplexing
  • Statistical multiplexing

References

M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals, Prentice Hall, Inc., 2008