Dynamic frequency scaling

This article is uncategorized. Please categorize this article to list it with similar articles. (December 2007)

Dynamic frequency scaling is a technique in computer architecture where a processor is run at a less-than-maximum frequency in order to conserve power. Dynamic frequency scaling is most commonly used in laptops and other mobile devices, where energy comes from a battery and thus is limited. Power consumption on a CMOS chip is given by the equation: <math>P = C \times V^2 \times F</math> where P is power, C is the capacitance being switched per clock cycle, V is voltage, and F is the processor frequency (cycles per second).^[1] Frequency decreases linearly with power consumption - halving the frequency halves the power consumption. Dynamic voltage scaling is another power conservation technique that works on the same principles as dynamic frequency scaling. Dynamic frequency scaling reduces the number of instructions a processor can issue in a given amount of time, thus reducing performance. Hence, it is generally used when the workload is low. A related-but-opposite technique is overclocking, whereby processor performance is increased by ramping the processor's (dynamic) frequency beyond the manufacturer's design specifications.

References